1. Field of the Invention
The present invention relates to sigma-delta modulators, and in particular, to sigma-delta modulators used for converting root-mean-square (RMS) signal values to direct current (DC) signals.
2. Related Art
The Sigma-Delta (ΣΔ) modulator is an electronic system that generates a digital output at very high resolution within a narrow bandwidth. The analog input is oversampled at a sampling rate (fS) much larger than the required Nyquist rate (fN), and it is coded as a bitstream with reduced number of (M) bits. As illustrated by FIG. 1, it contains a lowpass loop filter (LPF) and a coarse M-bit analog-to-digital converter (ADC) in the feedforward path (quantizer), and a digital-to-analog converter (DAC) in the feedback path. In order to produce a Nyquist rate output, the modulator is generally followed by a digital decimator. The decimator also filters the high-frequency noise and increases the length of the output digital word. The combination of a ΣΔ modulator with a digital decimation filter is named ΣΔ ADC. It is used in a large range of applications that require high resolution in a limited bandwidth, such as sensor interfaces, digital telecommunication receivers, precision applications and dc measurements.
The principle of operation of a ΣΔ modulator is better understood with the aid of a linearized model, depicted in FIG. 2. In this Laplace-domain model, L(s) is the loop filter transfer function and the feedback factor b express the ratio between ADC and DAC reference voltages. The analog-to-digital conversion of the loop filter output U(s) is modeled as an addition of quantization error Q(s). When a multi-bit quantizer is employed, the quantization error can be assumed to be a white noise source with a flat power spectrum density (PSD). The total quantization noise power (qRMS2) is independent of fS, and it is given by:
                              q          RMS          2                =                                            Δ              2                        12                    =                                    V              REF              2                                      12              ·                                                (                                                            2                      M                                        -                    1                                    )                                2                                                                        (        1        )            where Δ is the quantization step and VREF is the ADC reference voltage.
The modulator output Y(s) can be expressed as:
                              Y          ⁡                      (            s            )                          =                                            1                              1                +                                  bL                  ⁡                                      (                    s                    )                                                                        ·                          Q              ⁡                              (                s                )                                              +                                                    L                ⁡                                  (                  s                  )                                                            1                +                                  bL                  ⁡                                      (                    s                    )                                                                        ·                          X              ⁡                              (                s                )                                                                        (        2        )            where the term multiplying Q(s) is the noise transfer function (NTF), and the term multiplying X(s) is the signal transfer function (STF). When L(s) is a lowpass transfer function with very high DC gain, the STF is lowpass transfer function with 1/b gain at low frequencies, while the NTF is a highpass transfer function. FIG. 3 shows the typical digital output spectrum of a ΣΔ modulator when the analog input X(s) is a band-limited (fB=fN/2) low-frequency signal.
At low frequencies, the modulator output contains an undistorted replica of the analog input while the quantization noise is strongly attenuated. If the spectral content of the modulator output containing most of the shaped quantization noise power (nRMS2) is filtered out in the digital domain, very high resolution analog-to-digital conversion is achieved. The shaped quantization noise power after digital filtering is given by:
                              n          RMS          2                =                                            q              RMS              2                                      f              S                                ·                                    ∫                              -                                  f                  B                                                            f                B                                      ⁢                                                                                                  1                                          1                      +                                              bL                        ⁡                                                  (                                                      2                            ⁢                            π                            ⁢                                                                                                                  ⁢                            f                                                    )                                                                                                                                      2                            ⁢                              ⅆ                                                                  ⁢                f                                                                        (        3        )            
The noise shaping of the quantization errors and the digital filtering of the out-of-band noise are possible because fS>fN=2fB, i.e., the analog input is oversampled. The oversampling ratio (OSR) is defined as:OSR=fS/2fB  (4)
The simplest implementation of a ΣΔ modulator is achieved when the loop filter is a single integrator and a comparator is used as quantizer (FIG. 4). In this case, it is named single-bit 1st-order ΣΔ modulator and the digital output is a bitstream.
A multi-bit ΣΔ modulator is implemented if a multi-bit ADC is used as quantizer, and a multi-bit DAC is employed in the feedback path. High-order noise shaping is achieved when the loop filter contains two or more integrators. The loop filter of a bandpass ΣΔ modulator contains high-frequency resonator stages instead of integrators. The in-band shaped quantization noise power of an M-bit ΣΔ modulator implemented with a cascade of P integrators is generically expressed by:
                              n          RMS          2                =                                            V              REF              2                                      12              ·                                                (                                                            2                      M                                        -                    1                                    )                                2                                              ·                                    π                              2                ⁢                                                                  ⁢                P                                                                    (                                                      2                    ⁢                    P                                    +                  1                                )                            ·                              OSR                                                      2                    ⁢                                                                                  ⁢                    P                                    +                  1                                                                                        (        5        )            
LOG-RMS to DC converters are electronic circuits that generate a DC output signal (either current or voltage), proportional to the logarithmic of the Root-Mean-Square (RMS) value (the square-root of the power) of the input signal. Such devices are used in a variety of applications, such as test and measurement, and communications, where a measure of the signal strength is important. In general, the response of RMS-measuring devices is insensitive to the precise shape of the input signal; i.e., it is insensitive to crest factor variations. This is especially important in applications were the converter input signals can attain multiple different formats (modulation parameters, variable coding, etc. . . . ). A specific property of LOG-RMS to DC converters is the compression of the output dynamic range enabled by the logarithmic function. LOG-RMS detectors can be implemented based on the explicit calculation of the input RMS level, or based on implicit calculation.
Explicit calculation is the most straight-forward method of implementing a LOG-RMS to DC converter, and it is illustrated in FIG. 5. The input signal is squared, low-pass filtered and the square-root operation is calculated. Finally, the logarithmic function is applied. The overall transfer of this converter can be expressed as:
                    y        =                              K            log                    ·                      Log            ⁡                          (                                                K                  sqrt                                ⁢                                                                            K                      sq                                        ⁢                                                                  x                        2                                            _                                                                                  )                                                          (        6        )            and is thus dependent on all conversion gains from the input to the output (Ksq, Ksqrt and Klog). Therefore, the overall transfer is subject to temperature drift, frequency dependence and other sources of inaccuracy resulting from each of the converter's analog building blocks. Examples of explicit LOG-RMS to DC converters are known in the art. Since the signal of interest at the output (y) is situated at DC, offsets adding to the internal node voltages significantly limit the sensitivity of the converter for small input signals. An improved architecture for explicit LOG-RMS conversion is based on LOG-domain signal operations. In this case, the dynamic range requirements of the internal nodes are also reduced by logarithmic compression.
A LOG-RMS to DC converter can be implemented implicitly by means of a feedback loop. The main advantage of this method is the extension of the input-referred dynamic range. This is possible because the dynamic range requirements of the internal nodes are greatly reduced compared to the case of explicit RMS computation. FIG. 6 describes an example of implicit LOG-RMS detector based on LOG-domain operations.
Both the RMS and the LOG-RMS levels of the input signal are measured by this system:
                              y          1                =                                                                              x                  ⁡                                      (                    t                    )                                                  2                            _                                =                      x            RMS                                              (        7        )                                          y          2                =                              Ln            ⁡                          (                                                                                          x                      ⁡                                              (                        t                        )                                                              2                                    _                                            )                                =                      Ln            ⁡                          (                              x                RMS                            )                                                          (        8        )            
The main disadvantage of this implementation is the difficulty to realize high input-bandwidths, due to the fact that most of the signal-processing is carried out in the LOG-domain.
FIG. 7 depicts a LOG-RMS to DC converter based on the “difference-of-squares” technique. This architecture was first described in the context of linear RMS to DC conversion, and latter extended to LOG-RMS computation by means of an additional exponential conversion-gain in the feedback path. In this configuration, a linear analog multiplier is used to generate the difference of the square of the input signal and the square of the feedback signal, i.e. Km[βx2x2−βy2w2]. This is achieved by supplying one multiplier input with the sum of the input signal and the output signal, and the other input with the difference of these signals. The resulting difference of squares is then integrated, producing in the steady-state situation a dc level proportional to the logarithm of the true RMS value of the input signal. The integrator acts as a lowpass filter followed by an amplifier with high gain A. The lowpass filter removes the harmonics of the squared input signal, while the high gain forces the multiplier output to be zero.
The relation between the converter DC output y and the RF input signal x(t) can be calculated based on the analysis of block diagram shown in FIG. 7:
                    y        =                                            AK              m                        ⁡                          [                                                                    β                    x                    2                                    ⁢                                                                                    x                        ⁡                                                  (                          t                          )                                                                    2                                        _                                                  -                                                      β                    y                    2                                    ⁢                                      w                    2                                                              ]                                =                                    AK              m                        ⁡                          [                                                                    β                    x                    2                                    ⁢                                                                                    x                        ⁡                                                  (                          t                          )                                                                    2                                        _                                                  -                                                      β                    y                    2                                    ⁢                                      V                    o                    2                                    ⁢                                      Exp                    ⁡                                          (                                                                        2                          ⁢                          y                                                                          V                          i                                                                    )                                                                                  ]                                                          (        9        )            where Km is the multiplier conversion gain. The static transfer function of the difference-of-squares LOG-RMS to DC converter is obtained by solving (9) with the assumption that the dc gain A of the integrator approaches infinity:
                                          lim                          A              →              ∞                                ⁢                                          ⁢          y                =                              V            i                    ⁢                      ln            ⁡                          (                                                                    β                    x                                                        β                    y                                                  ·                                                      x                    RMS                                                        V                    o                                                              )                                                          (        10        )            
At low frequencies, where the feedforward gain AKm is very high, the difference-of-squares LOG-RMS to DC converter static transfer is independent of the multiplier conversion gain. It is only determined by the scaling factors βx, βy, Vo and Vi.
An RMS to DC converter based on the difference-of-squares principle can also be implemented using two matched squaring circuits. The addition of an exponential conversion-gain in the feedback path (FIG. 8) transforms this system in a LOG-RMS to DC converter.
The relation between the converter DC output y and the RF input signal x(t) can be calculated based on the analysis of block diagram shown in FIG. 8:
                    y        =                              A            ⁡                          [                                                                    K                    x                                    ⁢                                                                                    x                        ⁡                                                  (                          t                          )                                                                    2                                        _                                                  -                                                      K                    y                                    ⁢                                      w                    2                                                              ]                                =                      A            ⁡                          [                                                                    K                    x                                    ⁢                                                                                    x                        ⁡                                                  (                          t                          )                                                                    2                                        _                                                  -                                                      K                    y                                    ⁢                                      V                    o                    2                                    ⁢                                      Exp                    ⁡                                          (                                                                        2                          ⁢                          y                                                                          V                          i                                                                    )                                                                                  ]                                                          (        11        )            where Kx and Ky are the conversion gains of the squaring cells. Again, the static transfer function of the difference-of-squares RMS-to-DC converter is obtained by solving (11) with the assumption that the dc gain A of the integrator approaches infinity:
                                          lim                          A              →              ∞                                ⁢                                          ⁢          y                =                              V            i                    ⁢                      ln            ⁡                          (                                                                                          K                      x                                                              K                      y                                                                      ·                                                      x                    RMS                                                        V                    o                                                              )                                                          (        12        )            
The difference-of-squares LOG-RMS to DC converters shown in FIGS. 7 and 8 present a wide operation bandwidth, allowing RMS detection of RF inputs, and a large input-referred dynamic range due to the implicit calculation of the LOG-RMS level.
An implicit LOG-RMS to DC converter can be implemented when a squaring cell is driven by a variable gain amplifier (VGA), as depicted in FIG. 9. The VGA gain is inversely proportional to the detector DC output y. Because an exponential function is placed in the feedback path, the overall converter transfer function becomes proportional to the logarithm of the input RMS level. The output of the detector cell in the forward path is proportional to the square of the input RF signal x(t) divided by the square of the feedback signal w. A low-pass filter (LPF) removes the frequency content above DC from the squaring cell output. The integrator input e consists of the low-pass filter output subtracted by a squared reference level Kr·R2:
                    e        =                                            K              x                        ·                                                                                x                    ⁡                                          (                      t                      )                                                        2                                _                                            w                2                                              -                                    K              r                        ·                          R              2                                                          (        13        )            
Assuming that the integrator acts as another low-pass filter followed by a high DC gain A, the relation between the converter DC output y and the RF input signal x(t) can be calculated:
                    y        =                              A            ·                          e              _                                =                      A            ⁡                          [                                                                    K                    x                                    ⁢                                                                                                              x                          ⁡                                                      (                            t                            )                                                                          2                                            _                                                              w                      2                                                                      -                                                      K                    r                                    ⁢                                      R                    2                                                              ]                                                          (        14        )            where Kx and Ky are the conversion gains of the squaring cells. The steady-state value of the feedback signal w is calculated by solving (14) with the assumption that A is infinite:
                                          lim                          A              →              ∞                                ⁢                                          ⁢          w                =                                                            K                x                                            K                R                                              ·                                    x              RMS                        R                                              (        15        )            
When the exponential relation between w and y is taken in account (w-=Exp(y/Vi), the detector output can be calculated:
                                          lim                          A              →              ∞                                ⁢                                          ⁢          y                =                              V            i                    ⁢                      ln            ⁡                          (                                                                                          K                      x                                                              K                      y                                                                      ·                                                      x                    RMS                                    R                                            )                                                          (        16        )            
The ΣΔ modulator can be combined with the difference-of-squares RMS to DC converter in order to obtain an RMS to DC converter with intrinsic digital output. This mixed-signal system is named ΣΔ difference-of-squares RMS to DC converter as described in U.S. Pat. Nos. 7,545,302 and 7,545,303. In this architecture, the measured RMS level of the RF input is coded as the DC level of the modulator digital output bitstream y[k]. The ΣΔ RMS to DC converter can be implemented around a forward path multiplier as depicted in FIG. 10, or based on feedforward and feedback signal squaring operations.
The large-signal operation of ΣΔ RMS to DC converters is very similar to the operation of their analog counterparts. In FIG. 10, the error signal e(t) is also proportional to the difference between the squared input signal x(t)2 and the squared analog feedback signal y(t)2. The relation between y(t), the analog input x(t), and the integrator output u(t) can be calculated:
                                          u            ⁡                          (              t              )                                A                =                                            K              m                        ⁡                          (                                                                    β                    x                    2                                    ·                                                                                    x                        ⁡                                                  (                          t                          )                                                                    2                                        _                                                  -                                                      β                    y                    2                                    ⁢                                                                                    y                        ⁡                                                  (                          t                          )                                                                    2                                        _                                                              )                                =                                    K              m                        ⁡                          (                                                                    β                    x                    2                                    ·                                                                                    x                        ⁡                                                  (                          t                          )                                                                    2                                        _                                                  -                                                      β                    y                    2                                    ⁡                                      [                                                                  y                        DC                        2                                            +                                                                                                    q                            ⁡                                                          (                              t                              )                                                                                2                                                _                                                              ]                                                              )                                                          (        17        )            where y(t)=yDC+q(t) is the analog version of the digital output y[k] and q(t) is the quantization error added during the internal analog-to-digital conversion of the integrator output u(t). Assuming that the integrator DC-gain A approaches infinity, the large-signal static transfer of the ΣΔ difference-of-squares RMS-to-DC converter (FIG. 10) can be obtained by solving (17):
                                          lim                          A              →              ∞                                ⁢                                          ⁢                      y            DC                          =                                                                                                  β                    x                    2                                                        β                    y                    2                                                  ⁢                                                                            x                      ⁡                                              (                        t                        )                                                              2                                    _                                            -                                                                    q                    ⁡                                          (                      t                      )                                                        2                                _                                              =                                                                                          β                    x                    2                                                        β                    y                    2                                                  ⁢                                  x                  RMS                  2                                            -                              q                RMS                2                                                                        (        18        )            
The steady-state DC solution for the ΣΔ RMS-to-DC converter depicted in FIG. 10 is very similar to the solution obtained for analog RMS-to-DC converters. The major difference is the additional term accounting for the quantization error mean-square value qRMS2. This term arises from the fact that the feedback bitstream, containing both the measured RMS level at DC and the added quantization error at high frequencies, is squared. In practice, the value of qRMS2 influences the law-conformance error for small input-power levels and defines the lower limit of the input-referred dynamic range.